A 3D INTEGRATED UNIVERSAL DIGITAL GATE

Non-Confidential description of the invention

The present subject matter described herein, in general, relates to amorphous devices performing various logic functions. More specifically, the present invention relates to amorphous devices for universal digital logic gates, such as NAND gates and NOR gates, made by stacking of amorphous layers.The invention discloses a device configured to create digital logic gates, comprising : a first layer fabricated using amorphous semiconducting material sandwiched between metal of either work function, to provide a diode logic OR/AND gate;a second layer configured over the first layer as a means for inverting the output from the first layer fabricated using an insulator, amorphous semiconductors and metal electrodes; a common metal layer acting as output contact for first layer and input contact for second layer ; and wherein the metal contact at the input side may be varied;and wherein the output electrode of first layer of OR/ AND gate and input electrode of second layer of inverter are merged into a single metal layer to get a single device working as NOR/ NAND gate.

Inventors

Dr. B. Mazhari (EE), Mr. Ankita gangwar (PhD Student, EE)

IPA

201611005433

Date of Filing

Status

Granted

Date Of Grant

28/02/2020

Downloads