A Thin Film Transistor with High Drain Current Induced by a Trap-assisted Electric Double Layer
Non-Confidential description of the invention
Present invention,pertains to transistors, and more particularly to thin film transistors with high drain current induced by a trap-assisted Electric double layer. A thin film transistor structure is described wherein high effective gate capacitance and associated large drain current at low operating voltage is achieved through creation of a trap assisted electric double layer at the interface. The use of dopants acting as traps ensured low recombination and high channel charge density.
Prof.B.Mazhari,EE Ankita gangwar,EE (PhD Student)
Date of Filing