Potential Well Based FDSOI MOSFET (PWFDSOI MOSFET)

Non-Confidential description of the invention

The present invention discloses a device which is a fully depleted silicon on insulator Metal Oxide Semiconductor Field Effect Transistor (FDSOI MOSFET) having transistor gate wherein the device comprises highly doped planar well regions (TS, TD) in the buried oxide (BOX) under source and drain regions giving rise to potential well in the source and drain. These potential wells decrease the OFF current of the device. This invention meets these challenges in the form of realizing a novel planar device having comparable or better characteristics at 20/10 nm and smaller gate lengths and significantly lesser circuit design and process complexity.

Inventors

Dr. S. Qureshi (EE), Ms. Shruti Mehrotra (PhD Student, EE)

IPA

201911014942

Date of Filing

13/04/2019

Status

Date Of Grant

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